目录
目录README.md

IC_FPGA_projects

This repository is used to introduce to some projects or modules bases on the mainly lanuage–verilog.

1 slove the every time git push need to input the username and password.

git config –global credential.helper store //then git push again,and next will not need to input the username and password. =======

2 Useful references

[1] https://github.com/sin-x/FPGA/tree/master

Tools

Tools Installtion

1.科学上网:clash verge + bigMe.pro(三个性价比比较高的机场); 2.Google + Git + VS code; 3.iverilog + gtkwave;

Tools Config

1 Vscode PlugIn For verilog

1.设置VScode的terminal为git bash:Shell.Windows—-git bash; 2.Iverilog 安装:官网安装;

where iverilog
where vvp
where gtkwave

安装vscode的插件:Verilog-HDL/SystemVerilog/Bluespec System Verilog;

关于

IC/FPGA Project Module Code.

114.0 KB
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    Gitlink(确实开源)
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