目录
Stefan Hajnoczi

aspeed queue:

  • Fixed memory leaks in qtest tests
  • Reworked and fixed HACE (crypto) model for AST2700 SoC
  • Extended HACE qtest tests
  • Fixed RAM size detection on BE hosts
  • Added network backends to ast2700fc machine
  • Mapped main SoC memory into system memory on multi SoC machines

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Merge tag ‘pull-aspeed-20250526’ of https://github.com/legoater/qemu into staging

aspeed queue:

  • Fixed memory leaks in qtest tests
  • Reworked and fixed HACE (crypto) model for AST2700 SoC
  • Extended HACE qtest tests
  • Fixed RAM size detection on BE hosts
  • Added network backends to ast2700fc machine
  • Mapped main SoC memory into system memory on multi SoC machines

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gpg: Signature made Mon 26 May 2025 04:04:38 EDT

gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1

gpg: Good signature from “Cédric Le Goater clg@redhat.com“ [full]

gpg: aka “Cédric Le Goater clg@kaod.org“ [full]

Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1

  • tag ‘pull-aspeed-20250526’ of https://github.com/legoater/qemu: (39 commits) docs: Remove ast2700fc from Aspeed family boards hw/arm/fby35: Map BMC memory into system memory hw/arm/aspeed_ast27x0-fc: Map ca35 memory into system memory hw/arm/aspeed_ast27x0: Fix unimplemented region overlap with vbootrom hw/arm/aspeed_ast2700-fc: Reduce ca35 ram size to align with ast2700a1 hw/arm/aspeed_ast2700-fc: Add network support hw/arm/aspeed_ast27x0: Fix RAM size detection failure on BE hosts hw/intc/aspeed Fix coding style hw/intc/aspeed: Set impl.min_access_size to 4 test/qtest/hace: Add tests for AST2700 test/qtest/hace: Support to validate 64-bit hmac key buffer addresses test/qtest/hace: Support to test upper 32 bits of digest and source addresses test/qtest/hace: Support 64-bit source and digest addresses for AST2700 test/qtest/hace: Update source data and digest data type to 64-bit test/qtest/hace: Add tests for AST1030 test/qtest/hace: Add SHA-384 tests for AST2600 test/qtest/hace: Add SHA-384 test cases for ASPEED HACE model test/qtest/hace: Adjust test address range for AST1030 due to SRAM limitations test/qtest/hace: Specify explicit array sizes for test vectors and hash results test/qtest: Introduce a new aspeed-hace-utils.c to place common testcases …

Signed-off-by: Stefan Hajnoczi stefanha@redhat.com

9天前121445次提交
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