Bump nemu ref in ready-to-run (#141) NEMU commit: 36342a16bb49b90ba4397c9e8193ac7733ae1088 NEMU configs: riscv64-xs-ref_defconfig riscv64-dual-xs-ref_defconfig riscv64-xs-ref-debug_defconfig riscv64-dual-xs-ref-debug_defconfig Including: fix(iprios): fix iprios mask fix(sstc): menvcfg.sstc shouldn’t control an attempt to access vstimecmp (#1093) fix(aia): mstateen0.AIA shouldn’t have effect on attempts in VS-mode to access sireg (#1090) fix(wfi): resume from a WFI whenever an interrupt is pending at any privilege level fix(AIA): clear hvictl inject sideband after interrupt trap fix(HLV, HSV): add trigger check for HLV/HLVX/HSV instruction (#1052) config(matrix): align AME defconfigs with XS configs (#1120)
Bump nemu ref in ready-to-run (#141)
NEMU commit: 36342a16bb49b90ba4397c9e8193ac7733ae1088
Including:
This repo includes some prebuilt workloads and difftest reference libaries. Please refer to XiangShan-doc to learn how to use them.
This repo may be abandoned in feature, as we are trying to provide prebuilt binaries through Github release.
riscv64-nemu-interpreter-so
riscv64-nemu-interpreter-dual-so
riscv64-spike-so
linux.bin
microbench.bin
apps/microbench
coremark-2-iteration.bin
apps/coremark
copy_and_run.bin
apps/loader
flash_recursion_test.bin
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XiangShan ready-to-run binaries
This repo includes some prebuilt workloads and difftest reference libaries. Please refer to XiangShan-doc to learn how to use them.
This repo may be abandoned in feature, as we are trying to provide prebuilt binaries through Github release.
Prebuilt difftest reference libaries
riscv64-nemu-interpreter-soriscv64-nemu-interpreter-dual-soriscv64-spike-soPrebuilt workloads
linux.binBuilt accodring to XiangShan-docmicrobench.binapps/microbenchcoremark-2-iteration.binapps/coremarkcopy_and_run.binapps/loaderflash_recursion_test.bin