linux-thead/arch/riscv/mm
Chen Pei 3d6305636e riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm
Switch to our own constant for the satp register instead of using
the old name from a legacy version of the privileged spec.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2025-02-13 15:59:46 +08:00
..
Makefile riscv: Use generic asid algorithm to implement switch_mm 2020-12-31 01:35:06 +00:00
asid.c riscv: Add new asid lib code from arm 2020-12-31 01:35:05 +00:00
cacheflush.c riscv: Fixup CONFIG_SMP off compile error 2022-03-28 19:27:57 +08:00
context.c riscv: use CSR_SATP instead of the legacy sptbr name in switch_mm 2025-02-13 15:59:46 +08:00
dma-mapping.c riscv: Support non-coherency memory model 2020-12-31 01:34:44 +00:00
extable.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
fault.c riscv: Fixup do_page_fault warning in uprobe_xol 2020-12-31 01:35:15 +00:00
hugetlbpage.c hugetlbfs: remove hugetlb_add_hstate() warning for existing hstate 2020-06-03 20:09:46 -07:00
init.c RISC-V: Add crash kernel support 2022-05-07 13:49:42 +08:00
ioremap.c riscv: Support non-coherency memory model 2020-12-31 01:34:44 +00:00
kasan_init.c arch, drivers: replace for_each_membock() with for_each_mem_range() 2020-10-13 18:38:35 -07:00
pageattr.c riscv: fix build warning of mm/pageattr 2020-07-30 11:37:50 -07:00
physaddr.c riscv: mm: add support for CONFIG_DEBUG_VIRTUAL 2020-01-23 10:40:06 -08:00
ptdump.c RISC-V: Add page table dump support for uefi 2020-10-02 14:31:33 -07:00
tlbflush.c riscv: Add CSR_SMCIR to replace sfence.vma 2022-03-30 10:47:46 +08:00